San Jose — Workforce Due Diligence™

Thesis

San Jose diligence must test semiconductor key-person risk and mission-critical bench depth — Elevated composite with accelerating CHIPS demand.

Executive summary

Workforce DD on San Jose targets in semiconductor-adjacent segments carries premium labor risk — mission-critical PM and electrical leadership are deal constraints on fab-exposed platforms.

Metrics

• WEI composite: 67 — Elevated tier
• Employment trend: Accelerating — QCEW Q3 2025
• Wage position: Material premium — vs. national median

Proceed with Mitigation

Semiconductor leadership and MEP bench are deal conditions

Proceed on targets with named cleanroom MEP succession and retention funding for mission-critical roles.

Key observations

• Semiconductor Programs Director holds two fab relationships.
• Mission-critical PM pool thin — semiconductor experience required.
• Material wage premium — retention required post-announcement.

Recommendations

• Semiconductor leadership retention. Structure 3-year retention for Programs Director with fab relationship milestones.
• MEP bench redundancy. Fund second electrical superintendent before close on fab-exposed targets.

Exposure assessment

San Jose-Sunnyvale-Santa Clara · H1 2026 · Elevated exposure · accelerating · material_premium

San Jose markets read Elevated on composite exposure with accelerating semiconductor and data-center adjacent demand — CHIPS Act and hyperscale spillover from NoVA-style pressure patterns. Organizational exposure concentrates in electrical superintendent, mission-critical PM, and cleanroom-adjacent MEP roles where premium compensation and security requirements compress the pool.

Key roles

• Mission-Critical PM (veryhigh) — Thin — semiconductor experience required. Accelerating trend sustains poaching from Bay Area.
• Electrical Superintendent (high) — Moderate — premium market. Data-center and fab scopes compete for same bench.
• MEP Estimator (high) — Thin at senior precon. Material premium — retention risk on CHIPS pursuits.

Executive implication

San Jose is a premium, accelerating market — viable for semiconductor and data-center thesis only with pre-staged mission-critical leadership and top-quartile compensation. Accelerating trend means entry window is narrowing; treat as High-exposure on senior roles despite Elevated composite.

Data sources & scope limitations

Sources

• BLS QCEW
• BLS OEWS
• CHIPS award tracking
• Data-center pipeline
• AlphaHire posting intelligence

Scope limitations

• Semiconductor vs. commercial split not fully isolated in MSA read.
• Security and cleanroom requirements not modeled at individual level.
• H1 2026 snapshot — accelerating CHIPS demand can tighten within one quarter.